Funding News: We Just Raised
$6 Million to speed up Analog Chip Design

An Indian startup is using artificial intelligence to automate the painstaking process of analog chip design through a digital assistant for engineers, in a bid to make the very hardware powering today's AI revolution faster to build.

Bengaluru-based Maieutic Semiconductors has closed a $6 million seed round with backing from Indian venture capital firms Endiya Partners and Exfinity Venture Partners and Japan's University of Tokyo Edge Capital Partners (UTEC), the company told Nikkei Asia.

Chief executive Gireesh Rajendran, who formerly worked at Texas Instruments and Qualcomm, said his company plans to begin early customer trials of its generative AI-powered virtual assistant by March, followed by a broader commercial launch.

"We'll first be very focused on getting a few lead customers," Rajendran said, adding that the initial rollout will target global chip companies with design operations in India as well as Japanese chip companies. He added that Maieutic is already in talks with several companies interested in deploying the technology.

Design work for digital chips, which process data and logic operations in binary form, has been largely automated for decades by electronic design automation (EDA) software. This has allowed engineers to scale and reuse designs for chips such as central processing units and memory devices. U.S. companies like Synopsys, Cadence Design Systems and Siemens EDA are the leading developers of such software.

In contrast, analog and mixed-signal chips handle continuous signals such as sound waves, light intensity and temperature. They perform essential functions in sensors, audio circuits and power management but rely heavily on skilled engineers to fine-tune transistor-level behavior so the circuits can accurately handle real-world signals.

"Analog chip designers today still rely on very manual, iterative processes," said Ashish Lachhwani, Maieutic's chief business officer. "What we are building will make those cycles faster, more systematic and less dependent on large teams."

Maieutic's AI copilot acts as an intelligent assistant that can be integrated in existing design tools, Lachhwani said. Trained on public data such as patents and research papers, the system can interpret specifications, circuit diagrams, simulation results and respond to engineers' queries in plain language.

The software can also suggest alternative architectures, evaluate trade-offs between power efficiency and performance, and automatically review designs to detect inconsistencies. Maieutic estimates that its AI tool could cut portions of the analog design cycle by half or even two-thirds. Users will be able to deploy the system locally to ensure data privacy.

The co-founders established Maieutic in April after previously founding Steradian Semiconductors, an imaging radar startup acquired by Japan's Renesas Electronics in 2022. Their experience in chip design, they said, convinced them that the analog segment is overdue for transformation.

"Having gone through those long, manual design cycles ourselves, we knew there had to be a better way," CBO Lachhwani said. "Gen AI gives us the tools to finally make analog design faster and more intelligent."

The founders also hope the technology can help offset a looming talent shortage as fewer students enter electrical engineering, even as demand for analog expertise grows.

Investor UTEC sees Maieutic as a bridge between Japan's hardware expertise and India's strength in AI and software. Kiran Mysore, principal at UTEC, said Maieutic's technology could accelerate advanced chip developments by "fundamentally compressing design cycles and redefining productivity for chip engineers worldwide."